|Assembly of Surface Mount Devices on Printed Circuit Boards|
|Posted by: rarnold ®
I am not that familiar with Dimensioning and Tolerancing so I would like to know whether anyone can suggest a good way to establish the proper length and position of a Printed Circuit Board (PCB) land pattern feature (i.e. pad) in order to achieve the following result.
The pad length and position allow the largest number of SMD leads (e.g. a QFP) to occupy a portion of the pad that results in the pads extending 10mils (~0.25mm) past the Toe ends and 15mils (~0.38mm) past the heel ends of the device leads.
Further information: In essence this requirement drives a pad length that is 25mil (~0.635mm) longer than the leads. But, both the length and position of the device leads involve tolerancing allowances.
Often, the perimeter dimension for the device leads (also referred to as Toe-Toe) is given as a BSC dimension. This dimension may also be toleranced (typical might be +/- 0.2mm). In either case, this dimension is needed to establish the position of the pads with respect to that of the device leads.
The device lead length is often given as a REF dimension or it might also be toleranced (typical might be +/- 0.15mm).
Of course, the best way to make sure that all of the device leads fit on the pads is to use the Maximum Device Lead Length and the Maximum Toe-Toe dimension. But this approach drives a condition where there is almost never the desired 10mils pad extension past the Toe and 15mils pad extension past the Heel.
Is there a way (other than simply using Nominal dimensions) to target the desired pad extensions and also account for the typical dimensional tolerances? I guess what I am asking is whether there is a way to use the available dimensional tolerances to produce the desired pad extension result with at least 95% confidence.
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